Friday, March 15, 2013

This is a pseudo-VU meter written in VHDL. I did it for an afternoon project to see what I could do with VHDL quickly.

VU Meter

I take the line level audio output from my computer and run it through a Schottky diode ( half wave rectification ), and then straight into a serial ADC. The rest is done on the Xilinx Spartan 3E FPGA.

A true VU meter would translate the volume level of the output signal to a certain dB level. Mine just peak detects the output of the ADC and then scales the output until I get good dynamic range out of the LEDs available. The end result could use some refinement, but I was happy with the rough draft.


FreePBX Syslog Setup