VHDL VU Meter

VU FPGA

There is a video at the end of the post, check it out!

This is a pseudo-VU meter written in VHDL. I did it for an afternoon project to see what I could do with VHDL quickly. I take the line level audio output from my computer and run it through a Schottky diode ( half wave rectification ), and then straight into a serial ADC. The rest is done on the Xilinx Spartan 3E FPGA.

A true VU meter would translate the volume level of the output signal to a certain DB level. Mine just peak detects the output of the ADC and then scales the output until I get good dynamic range out of the LEDs available. The end result could use some refinement, but I was happy with the rough draft.

I need to clean up my VHDL. I will have it up on github sooner rather than later!

VU ADC

 

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